Axiro Semiconductor Pvt. Ltd. is a leading fabless semiconductor 公司 based in Bengaluru, India, specializing in 高-performance chip design for global 5G/6G, defence, satellite communication, and 工业的 物联网 markets. 后退ed by the Murugappa Group through CG Power, Axiro leverages advanced design capabilities and strategic global manufacturing partnerships to deliver millions of ICs. With a strong focus on innovation, IP ownership in India, and sustainable growth, Axiro is at the forefront of India’s semiconductor mission.

职位描述

We are seeking an experienced SoC / Software / 建筑学 / IP Manager to lead the definition, development, and integration of system-on-chip (SoC) 建筑学s, software platforms, and IP strategies for 下一个-generation semiconductor 产品. In this role, you will manage a cross-功能al 团队 responsible for SoC 建筑学, software enablement, and IP 选择ion to deliver 高-performance, cost-effective solutions that meet diverse market 要求.​

This position requires deep expertise in SoC design, IP integration, software stack development, and strong leadership skills to drive technical execution and strategic alignment.​

职责 

• Define SoC 建筑学, including processor 选择ion, IP 要求, and system-level specifications.​
• Oversee IP evaluation, 选择ion, and integration, working with internal 团队s and third-party vendors to ensure optimal performance and cost.​
• Manage development of software stacks, BSPs, and drivers to 支持 SoC 功能ality and customer 应用s.​
• Work closely with design, verification, physical implementation, and 应用s engineering 团队s to ensure seamless integration andexecution.​
• Conduct PPA (Power, Performance, Area) analysis and trade-off studies to optimize 建筑学 and IP configurations.​
• Collaborate with external IP providers, EDA tool vendors, and technology partners to secure best-in-class solutions.​
• 支持 technical discussions with customers, 高照明 architectural choices, software capabilities, and product differentiators.​
• Mentor and lead engineers across 建筑学, IP, and software domains to build a 高-performing organization.​

要求

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Master’s degree preferred.​
• 12+ years in semiconductor design and 建筑学, with at least 5 years in SoC 建筑学, IP management, and software leadership roles.​
• Strong understanding of SoC design flows, IP integration, processor 建筑学s (RISC-V, ARM), and embedded software development.​
• Ability to lead cross-功能al 团队s and drive technical initiatives.​
• Excellent verbal and written communication skills for internal and external stakeholders.​
• Strong analytical skills and ability to resolve complex design and integration challenges.​
• Experience working with IP vendors, software 团队s, and global engineering organizations.​