F6103

The F6103 is an 8-element receiver silicon IC designed using a SiGe BiCMOS process for 14GHz to 16GHz SATCOM, weather 雷达, test and measurement, and 其他 phased array 应用s. The core IC has 6-bit phase control coupled with 30dB 获得 control on each channel to achieve fine beam 方向盘 and 获得 compensation between radiating elements. The device has 17dB nominal electric 获得 and -31dBm IP1dB. The core chip achieves an RMS phase error of 3° and an RMS 获得 error of 0.3dB over the frequency of operation.

The chip operates from 2.1V to 2.5V and 特征 ESD protection on all pins. The core design includes standard SPI protocol that operates up to 50MHz with fast beam switching, fast beam-状态 loading, and fast four on-chip beam storage. The module has four external bias pins (5-bit DACs) to control external LNAs, temperature reporting, and external biasing.