AX150

Name: P151A21
Brand: Axiro
SKU: SKU12345
Availability: InStock

P151A21

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8x Cortex-A55 CPUs operating at up to 2.3GHz in the primary 应用 cluster.
4x Cortex-A55 CPUs operating at up to 2.0GHz in the additional CPU cluster.
32KB/32KB L1 cache and 128KB L2 cache per CPU core, with 1MB L3 cache on CPU1 and 512KB L3 cache on CPU2.
Inline ECC 支持 on both CPU clusters for added reliability.
Dedicated secure processor based on Cortex-R5 in DCLS mode with ECC on cache and TCM.
Dedicated multi-purpose processor based on Cortex-R5 in DCLS mode with ECC on cache and TCM.
Safety CPU based on Cortex-R5F running at 800MHz in DCLS mode.
Dedicated Neural Network Processing Unit (NPU) for efficient AI processing.
Integrated Image Signal Processor (ISP) for efficient image processing capability.
IMG PowerVR 9XM GPU for advanced graphics and HMI rendering.
2x 4-lane MIPI-DSI interfaces and 4x LVDS display interfaces.
2x 4-lane MIPI-CSI interfaces with 支持 for 4 virtual channels.
1x 8-bit parallel CSI interface for additional camera integration flexibility.
H.264 video encode/decode and H.265 video encode/decode 支持.
8MB internal system RAM in the 应用s processing domain.
LPDDR4 / LPDDR4x DRAM 支持 with optional inline ECC.
2x USB 3.0 and 2x PCIe 3.0 dual-role RC/EP interfaces.
2x eMMC 5.1, 2x SD 3.0/SDIO, and 1x QuadSPI/OctalSPI storage interfaces.
1x Gigabit Ethernet TSN, 2x CAN-FD, 4x SPI, 8x UART, 12x I2C, GPIO, PWM, watchdog, timer, and temperature sensor 支持.
Real-time clock, system power/reset control, 32KHz oscillator, and 2048-bit secure storage register for low-power always-on system management.
汽车 AEC-Q100 Grade 2 (-40 ~ 105°C), HBM ESD Level 2, CDM ESD Level C1

8x Cortex-A55 CPUs operating at up to 2.3GHz in the primary 应用 cluster.
4x Cortex-A55 CPUs operating at up to 2.0GHz in the additional CPU cluster.
32KB/32KB L1 cache and 128KB L2 cache per CPU core, with 1MB L3 cache on CPU1 and 512KB L3 cache on CPU2.
Inline ECC 支持 on both CPU clusters for added reliability.
Dedicated secure processor based on Cortex-R5 in DCLS mode with ECC on cache and TCM.
Dedicated multi-purpose processor based on Cortex-R5 in DCLS mode with ECC on cache and TCM.
Safety CPU based on Cortex-R5F running at 800MHz in DCLS mode.
Dedicated Neural Network Processing Unit (NPU) for efficient AI processing.
Integrated Image Signal Processor (ISP) for efficient image processing capability.
IMG PowerVR 9XM GPU for advanced graphics and HMI rendering.
2x 4-lane MIPI-DSI interfaces and 4x LVDS display interfaces.
2x 4-lane MIPI-CSI interfaces with 支持 for 4 virtual channels.
1x 8-bit parallel CSI interface for additional camera integration flexibility.
H.264 video encode/decode and H.265 video encode/decode 支持.
8MB internal system RAM in the 应用s processing domain.
LPDDR4 / LPDDR4x DRAM 支持 with optional inline ECC.
2x USB 3.0 and 2x PCIe 3.0 dual-role RC/EP interfaces.
2x eMMC 5.1, 2x SD 3.0/SDIO, and 1x QuadSPI/OctalSPI storage interfaces.
1x Gigabit Ethernet TSN, 2x CAN-FD, 4x SPI, 8x UART, 12x I2C, GPIO, PWM, watchdog, timer, and temperature sensor 支持.
Real-time clock, system power/reset control, 32KHz oscillator, and 2048-bit secure storage register for low-power always-on system management.
汽车 AEC-Q100 Grade 2 (-40 ~ 105°C), HBM ESD Level 2, CDM ESD Level C1

AX150 is a 高-performance 汽车应用s processor built to 帮助 OEMs and Tier 1s deliver 下一个-generation digital cockpit platforms with 100 K DMIPS of CPU compute, 230 GFLOPS of GPU performance and 8 TOPS of NPU. By combining 高-performance heterogeneous processing, rich graphics, neural network acceleration, integrated imaging, and broad 汽车 connectivity, AX150 帮助s system designers a scalable foundation for advanced cockpit platforms that need strong 应用 performance, vision-enabled capability, rich multimedia, and safety-oriented reliability.

AX150 — Integrated Cockpit and Parking Intelligence

Unify intelligent cockpit and automated-parking 功能ality with the Axiro AX150. Purpose-built for 高ly integrated cockpit-plus-parking 域控制器s, AX150 combines multi-system cockpit processing with a 高-performance NPU and 汽车 image-signal processor for camera-based parking and perception workloads. The platform can simultaneously 支持 the digital cluster, infotainment, head-up display, multi-screen 3D HMI, intelligent voice, driver and occupant monitoring, surround 查看, DVR and automated parking assistance. By consolidating diverse cockpit, AI and vision 功能s on a single 汽车-grade SoC, AX150 enables 高er-end vehicles to reduce component count, simplify system integration and deliver a more seamless experience across 信息, 进入tainment, monitoring, and low-speed driving 功能s.

产品文档

类型

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日期

动作

PDF

AX150-Product-Brief

pdf | 399.96 KB

2026-08-18

数据表

AX150-数据表.pdf

| 44 KB

2026-08-18

PDF

2026-08-18

AX150-Product-Brief

pdf | 399.96 KB

数据表

2026-08-18

AX150-数据表.pdf

| 44 KB

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部件号 (1)

P151A21

地位

Primary 应用 CPU

8× Cortex-A55 @ 2.3 GHz (w/ inline ECC 支持)

Primary 应用 CPU cache

32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 1 MB L3

Secondary 应用 CPU

4× Cortex-A55 @ 2.0 GHz (w/ inline ECC 支持)

Secondary 应用 CPU cache

32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 512 KB L3

GPU

IMG PowerVR 9XM GPU

AI / ML acceleration

高-efficiency NPU

ISP / vision processing

ISP plus Vision DSP ×2

Video encode/decode

H.264 encode/decode; H.265 encode/decode

Display interfaces

2× 4-lane MIPI-DSI; 4× LVDS

Camera interfaces

2× 4-lane MIPI-CSI with 4 virtual channels; 1× 8-bit Parallel CSI

应用 SRAM

8 MB system RAM

External DRAM interface

LPDDR4/LPDDR4x; optional inline ECC

高-speed interfaces

2× USB 3.0; 2× PCIe 3.0 RC/EP dual-role

Ethernet

1× Gigabit Ethernet TSN

Storage interfaces

2× eMMC 5.1; 2× SD 3.0/SDIO; 1× QuadSPI/OctalSPI

Audio interfaces — 应用 domain

4× SPDIF; 6× single-channel I2S/TDM; 2× multi-channel I2S

ADC

12-bit SAR ADC, 5 MS/s; 4 analog input channels

General peripherals — 应用 domain

4× SPI; 8× UART; 12× I2C; GPIO; PWM; watchdog; timer

Secure processor / HSM

Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM; ECC on cache and TCM

Multi-purpose processor

Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM; ECC on cache and TCM

Safety island CPU

Cortex-R5F @ 800 MHz in DCLS mode

Safety island memory

1 MB system RAM; 128 KB ROM; all memory with ECC

Safety island interfaces / peripherals

1× QuadSPI/OctalSPI; 2× single-channel I2S/TDM; 2× CAN-FD; 4× SPI; 8× UART; 4× I2C; GPIO; PWM; temperature sensor; watchdog; timer

Low-power / RTC domain

32 kHz oscillator; real-time clock; system power and reset control; 2048-bit secure storage register

包裹

21 × 21 FCBGA

Junction temperature

-40 to 125°C Tj

汽车 qualification / ESD

AEC-Q100 Grade 2, -40 to 105°C; HBM ESD Level 2; CDM ESD Level C1

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部件号 (1)	地位	Primary 应用 CPU	Primary 应用 CPU cache	Secondary 应用 CPU	Secondary 应用 CPU cache	GPU	AI / ML acceleration	ISP / vision processing	Video encode/decode	Display interfaces	Camera interfaces	应用 SRAM	External DRAM interface	高-speed interfaces	Ethernet	Storage interfaces	Audio interfaces — 应用 domain	ADC	General peripherals — 应用 domain	Secure processor / HSM	Multi-purpose processor	Safety island CPU	Safety island memory	Safety island interfaces / peripherals	Low-power / RTC domain	包裹	Junction temperature	汽车 qualification / ESD
P151A21	-	8× Cortex-A55 @ 2.3 GHz (w/ inline ECC 支持)	32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 1 MB L3	4× Cortex-A55 @ 2.0 GHz (w/ inline ECC 支持)	32 KB I-cache + 32 KB D-cache per core; 128 KB L2 per core; 512 KB L3	IMG PowerVR 9XM GPU	高-efficiency NPU	ISP plus Vision DSP ×2	H.264 encode/decode; H.265 encode/decode	2× 4-lane MIPI-DSI; 4× LVDS	2× 4-lane MIPI-CSI with 4 virtual channels; 1× 8-bit Parallel CSI	8 MB system RAM	LPDDR4/LPDDR4x; optional inline ECC	2× USB 3.0; 2× PCIe 3.0 RC/EP dual-role	1× Gigabit Ethernet TSN	2× eMMC 5.1; 2× SD 3.0/SDIO; 1× QuadSPI/OctalSPI	4× SPDIF; 6× single-channel I2S/TDM; 2× multi-channel I2S	12-bit SAR ADC, 5 MS/s; 4 analog input channels	4× SPI; 8× UART; 12× I2C; GPIO; PWM; watchdog; timer	Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM; ECC on cache and TCM	Cortex-R5 in DCLS mode; 32 KB I-cache + 32 KB D-cache; 128 KB TCM; ECC on cache and TCM	Cortex-R5F @ 800 MHz in DCLS mode	1 MB system RAM; 128 KB ROM; all memory with ECC	1× QuadSPI/OctalSPI; 2× single-channel I2S/TDM; 2× CAN-FD; 4× SPI; 8× UART; 4× I2C; GPIO; PWM; temperature sensor; watchdog; timer	32 kHz oscillator; real-time clock; system power and reset control; 2048-bit secure storage register	21 × 21 FCBGA	-40 to 125°C Tj	AEC-Q100 Grade 2, -40 to 105°C; HBM ESD Level 2; CDM ESD Level C1

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AX150

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描述

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AX150-Product-Brief

AX150-数据表.pdf

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P151A21

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AX150

产品详情

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描述

应用

产品文档

AX150-Product-Brief

AX150-数据表.pdf

Design & Development

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P151A21

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