Axiro Semiconductor Pvt. Ltd. is a leading fabless semiconductor 公司 based in Bengaluru, India, specializing in 高-performance chip design for global 5G/6G, defence, satellite communication, and 工业的 物联网 markets. 后退ed by the Murugappa Group through CG Power, Axiro leverages advanced design capabilities and strategic global manufacturing partnerships to deliver millions of ICs. With a strong focus on innovation, IP ownership in India, and sustainable growth, Axiro is at the forefront of India’s semiconductor mission.

职位描述

As Axiro’s Test Engineering Lead, you will own the strategy and execution of test development across all product lines including Sub-8GHz, 5G mmWave, and SATCOM leveraging SiGe, GaAs, and GaN technologies. This hands-on leadership role integrates new product introduction (NPI), sustaining 支持, test operations, and oversight of internal and external development 团队s across global sites. You will define Axiro’s test roadmap, standardize test 基础设施, lead strategic vendor engagements, and implement scalable, cost-effective, 高-quality test practices. Your leadership will ensure best-in-class test coverage and quality, enabling product reliability, manufacturing scalability, and production readiness in a fabless, 高-mix environment.

职责 

Test Strategy & 基础设施

• Define and execute Axiro’s long-term test roadmap, including ATE platform 选择ion, socket strategies, and test partner engagement.
• Align test strategy with both low-volume/高-mix and 高-volume/low-mix production models across product lines.
• Standardize procedures for NPI test release, golden unit calibration, and production test readiness across OSAT partners.
• Own tester platform 文档 and configuration management, including test hardware (load boards, handler kits, docking kits) and software version control.
• Oversees maintenance and upgrades of Axiro-managed testers, handlers, and their peripheral equipment.

团队 & Partner Management

• Lead internal and external test engineering 团队s, assigning ownership across product lines and development phases.
• Manage vendor relationships with ATE suppliers, test hardware fabricators, and OSATs.
• Oversee onboarding, planning, quality re查看, and deliverables for test contractors and external partners.

Test Development & Operations

• Lead the development of scalable, cost optimized ATE test solutions for all RFIC 产品.
• Define and enforce mass production test rules (e.g., socket maintenance, calibration cycles, correlation methods).
• Drive bench-to-ATE correlation, implement GRR methodology, and manage statistical limit setting.
• Maintain structured test software libraries with full version control and release traceability.
• Lead tester migration initiatives, including transitions to lower cost ATE platforms and proactive management of tester EOL at vendor sites.
• Drive quality via management of EQA test process, D/PAT limit controls, SYL/SBL binning strategies.

Optimization & Continuous Improvement

• Improve gross margin through yield enhancement, test time reduction, and test content optimization—leveraging correlation analysis to eliminate redundant tests.
• Build internal libraries for reusable test IP and standardized hardware interfaces.
• Refine test bring-up and debug flows to reduce ramp risk and accelerate time-to-volume.
• Document and institutionalize advanced screening methodologies for known failure mechanisms and integrate into DFT planning workflows.

Cross-功能al Collaboration

• Partner with design 团队s to provide DFT feed后退 and influence test coverage at design 建筑学 stage.
• Collaborate with product and quality 团队s to resolve yield issues, RMAs, and test-related excursions.

要求

• BSEE or equivalent with 8+ years of test engineering experience in semiconductor product development.
• Pr烤箱 experience developing and releasing RF ATE test solutions, including production ramp, on Advantest 93k platforms (SMT7/8, WS RF8/18, PS1600, DPS64/128, AVI64).
• In-depth knowledge of RF and mixed-signal test techniques.
• Can lead yield optimization strategies, and cost-effective test planning.
• Experience across a broad set of product 类型s: LNAs, 开关, DVGA, drivers, PA bias controllers, beamformers, up/downconverters.
• Familiarity with communication protocols (SPI, I2C, I3C),
• Solid understanding of SCAN/BIST, OTP, NVM, and performance calibration implementation in test flows.
• Strong statistical analysis proficiency (JMP, GRR, DOE, correlation).
• Demonstrated success managing multiple concurrent programs, vendor coordination, and 支持ing 高-reliability ramp schedules.
• Excellent communication skills and leadership experience with a pr烤箱 ability to mentor engineers and collaborate cross-功能ally.

 

Axiro Semiconductor Inc. is an equal opportunity employer and does not discriminate a获得st any employee or applicant for employment because of race, religion, color, sex, national origin, age, sexual orientation, gender identity, genetic 信息, disability or veteran 地位, or any 其他 category protected by applicable federal, 状态, or local laws. Please 联系 Human Resources at HR4U@axiro.com  if you require reasonable accommodation.

 

Notice to California Applicants: Axiro Semiconductor Inc. is committed to complying with the California Privacy Rights Act (“CPRA”) effective January 1, 2023; and all data privacy laws in the jurisdictions in which it recruits and hires employees. A Notice to California Job Applicants Regarding the Collection of Personal 信息 can be located on our website. Applicants with disabilities may access this notice in an alternative format by 联系ing HR4U@axiro.com.

 

CA Applicant Notice: If you are 选择ed for this position with Axiro Semiconductor Inc., your offer is contingent upon the satisfactory completion of several 要求, including but not limited to, a criminal 后退ground check. We consider qualified applicants with arrest or conviction records for employment in accordance with all local ordinances and 状态 laws, including the California Fair Chance Act (FCA). The 后退ground check assessment will consider whether a criminal history could reasonably have a direct, adverse impact on the job-related safety, security, trust, regulatory compliance, or suitability for this role. Such findings may result in withdrawal of a conditional job offer.

 

Axiro Semiconductor Inc. provides ACA-compliant health coverage and, where applicable, additional benefits such as dental, vision, and 其他 voluntary insurance options to eligible employees. Eligible employees may also participate in a 401(k) plan with employer matching and 其他 公司-sponsored programs. The 公司 provides paid sick leave in accordance with California law and applicable local 要求, as well as 其他 leave benefits as required by law.

 

You can know more 关于 us via our website RF & mmWave Semiconductor Solutions for 5G & Satcom | Axiro.